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u4223b rev. a7, 06-mar-01 1 (18) time-code receiver with a/d converter description the u4223b is a bipolar integrated straight-through receiver circuit in the frequency range of 40 khz to 80 khz. the device is designed for radio-controlled clock applications. features very low power consumption very high sensitivity high selectivity by using two crystal filters power-down mode available only a few external components necessary 4-bit digital output agc hold mode block diagram power supply adc decoder impulse circuit rectifier & integrator agc amplifier pon clk d3 d2 d1 d0 dec sb vcc gnd in 16 12 17 18 19 20 11 10 9 13 flb fla sl 4561415 q1a q1b q2a q2b rec int 1 3 2 78 figure 1. block diagram ordering and package information extended type number package remarks u4223b-mfs sso20 plastic u4223b-mfsg3 sso20 plastic taping according to iec-286-3 t4223b-mf no die on foil T4223B-MC no die on carrier
u4223b rev. a7, 06-mar-01 2 (18) pin description 3 4 5 13 14 15 16 17 18 19 20 2 1 6 7 8 9 10 12 11 vcc in gnd sb dec d0 (lsb) d1 d2 d3 (msb) pon clk u4223b q1a q1b rec int fla q2b q2a sl flb figure 2. pinning pin symbol function 1 vcc supply voltage 2 in amplifier input 3 gnd ground 4 sb bandwidth control 5 q1a crystal filter 1 6 q1b crystal filter 1 7 rec rectifier output 8 int integrator output 9 dec decoder input 10 fla lowpass filter 11 flb lowpass filter 12 clk clock input for adc 13 sl agc hold mode 14 q2a crystal filter 2 15 q2b crystal filter 2 16 pon power on/off control 17 d3 data out msb 18 d2 data out 19 d1 data out 20 d0 data out lsb in a ferrite antenna is connected between in and vcc. for high sensitivity, the q factor of the antenna circuit should be as high as possible. please note that a high q factor requires temperature compensation of the resonant frequency in most cases. specifications are valid for q>30. an optimal signal-to-noise ratio will be achieved by a resonant resistance of 50 to 200 k . in vcc figure 3. sb a resistor r sb is connected between sb and gnd. it controls the bandwidth of the crystal filters. it is recom- mended: r sb = 0 for dcf 77.5 khz, r sb = 10 k for 60 khz wwvb and r sb = open for jg2as 40 khz. sb gnd figure 4.
u4223b rev. a7, 06-mar-01 3 (18) q1a, q1b in order to achieve a high selectivity, a crystal is con- nected between the pins q1a and q1b. it is used with the serial resonant frequency of the time-code transmitter (e.g., 60 khz wwvb, 77.5 khz dcf or 40 khz jg2as). the equivalent parallel capacitor of the filter crystal is internally compensated. the compensated value is about 0.7 pf. if full sensitivity and selectivity are not needed, the crystal filter can be substituted by a capacitor of 82 pf. q1a q1b gnd figure 5. rec rectifier output and integrator input: the capacitor c 1 between rec and int is the lowpass filter of the rectifier and at the same time a damping element of the gain control. rec gnd figure 6. dec decoder input: senses the current through the integration capacitor c 2 . the dynamic input resistance has a value of about 420 k and is low compared to the impedance of c 2 . dec gnd figure 7. sl agc hold mode: sl high (v sl = v cc ) sets normal func- tion, sl low (v sl = 0) disconnects the rectifier and holds the voltage v int at the integrator output and also the agc amplifier gain. vcc sl figure 8. int integrator output: the voltage v int is the control voltage for the agc. the capacitor c 2 between int and dec defines the time constant of the integrator. the current through the capacitor is the input signal of the decoder. int gnd figure 9. fla, flb lowpass filter: a capacitor c 3 connected between fla and flb suppresses higher frequencies at the trigger circuit of the decoder. flb flb 94 8377 figure 10.
u4223b rev. a7, 06-mar-01 4 (18) q2a, q2b according to q1a/q1b, a crystal is connected between the pins q2a and q2b. it is used with the serial resonant frequency of the time-code transmitter (e.g., 60 khz wwvb, 77.5 khz dcf or 40 khz jg2as). the equiva- lent parallel capacitor of the filter crystal is internally compensated. the value of the compensation is about 0.7 pf. q2a q2b gnd figure 11. pon if pon is connected to gnd, the receiver will be activated. the set-up time is typically 0.5 s after applying gnd at this pin. if pon is connected to vcc, the receiver will switch to power-down mode. vcc pon figure 12. d0, d1, d2, d3 the outputs of the adc consist of pnp-npn push-pull stages and can be directly connected to a microcomputer. in order to avoid any interference of the output into the antenna circuit, we recommend terminating each digital output with a capacitor of 10 nf. the digitalized signal of the adc is gray coded (see table). it should be taken into account that in power-down mode (pon = high), d0, d1, d2 and d3 will be high. a sequence of the digitalized time-code signal can be analyzed by a special noise-suppressing algorithm in order to increase the sensitivity and the signal-to-noise ratio (more than 10 db compared to conventional decoding). details about the time-code format are described separately. decimal gray 0 0000 1 0001 2 0011 3 0010 4 0110 5 0111 6 0101 7 0100 8 1100 9 1101 10 1111 11 1110 12 1010 13 1011 14 1001 15 1000 vcc d0 ... d3 gnd pon figure 13. clk the input of the adc is switched to the agc voltage by the rising slope of the clock. when conversion time has passed (about 1.8 ms at 25 c), the digitalized field- strength signal is stored in the output registers d0 to d3 as long as the clock is high and can be read by a micro- computer. the falling slope of the clock switches the input of the adc to the time-code signal. in the mean- time, the digitalized time-code signal is stored in the output registers d0 to d3 as long as the clock is low (see figure 14).
u4223b rev. a7, 06-mar-01 5 (18) 0 4 8 12 t/ms 50 100 v clk mv 711 now, the time-code signal can be read falling edge initiates time-code conversion rising edge initiates agc signal conversion now, the agc value can be read figure 14. in order to minimize interferences, we recommend a voltage swing of about 100 mv. a full supply-voltage swing is possible but reduces the sensitivity. clk gnd vcc figure 15. please note: the signals and voltages at the pins rec, int, fla, flb, q1a, q1b, q2a and q2b cannot be measured by standard measurement equipment due to very high inter- nal impedances. for the same reason, the pcb should be protected against surface humidity. design hints for the ferrite antenna the bar antenna is a very critical device of the complete clock receiver. observing some basic rf design rules helps to avoid possible problems. the ic requires a reso- nant resistance of 50 k to 200 k . this can be achieved by a variation of the l/c-relation in the antenna circuit. it is not easy to measure such high resistances in the rf region. a more convenient way is to distinguish between the different bandwidths of the antenna circuit and to cal- culate the resonant resistance afterwards. thus, the first step in designing the antenna circuit is to measure the bandwidth. figure 17 shows an example for the test circuit. the rf signal is coupled into the bar antenna by inductive means, e.g., a wire loop. it can be measured by a simple oscilloscope using the 10:1 probe. the input capacitance of the probe, typically about 10 pf, should be taken into consideration. by varying the fre- quency of the signal generator, the resonant frequency can be determined. scope rf signal generator 77.5 khz c res probe 10 : 1 wire loop 10 m figure 16. at the point where the voltage of the rf signal at the probe drops by 3 db, the two frequencies can then be measured. the difference between these two frequencies is called the bandwidth bw a of the antenna circuit. as the value of the capacitor c res in the antenna circuit is known, it is easy to compute the resonant resistance according to the following formula: r res 1 2 bw a c res where r res is the resonant resistance, bw a is the measured bandwidth (in hz) c res is the value of the capacitor in the antenna circuit (in farad). if high inductance values and low capacitor values are used, the additional parasitic capacitances of the coil ( 20 pf) must be considered. the q value of the capa- citor should be no problem if a high q type is used. the q value of the coil differs more or less from the dc resistance of the wire. skin effects can be observed but do not dominate. therefore, it should not be a problem to achieve the recommended values of the resonant resistance. the use of thicker wire increases the q value and accordingly reduces bandwidth. this is advantageous in order to improve reception in noisy areas. on the other hand, temperature compensation of the resonant frequency might become a problem if the bandwidth of the antenna circuit is low compared to the temperature variation of the resonant frequency. of course, the q value can also be reduced by a parallel resistor.
u4223b rev. a7, 06-mar-01 6 (18) temperature compensation of the resonant frequency is a must if the clock is used at different temperatures. please ask your supplier of bar antenna material and of capacitors for specified values of the temperature coefficient. furthermore, some critical parasitics have to be consid- ered. these are shortened loops (e.g., in the ground line of the pcb board) close to the antenna and undesired loops in the antenna circuit. shortened loops decrease the q value of the circuit. they have the same effect like con- ducting plates close to the antenna. to avoid undesired loops in the antenna circuit, it is recommended to mount the capacitor c res as close as possible to the antenna coil or to use a twisted wire for the antenna-coil connection. this twisted line is also necessary to reduce feedback of noise from the microprocessor to the ic input. long connection lines must be shielded. a final adjustment of the time-code receiver can be carried out by pushing the coil along the bar antenna. the maximum of the integrator output voltage v int at pin int indicates the resonant point. but attention: the load current should not exceed 1 na, that means an input resistance 1 g of the measuring device is required. therefore, a special dvm or an isolation amplifier is necessary. absolute maximum ratings parameters symbol value unit supply voltage v cc 5.25 v ambient temperature range t amb 40 to +85 c storage temperature range r stg 40 to +85 c junction temperature t j 125 c electrostatic handling (mil standard 883 d), except pins 2, 5, 6, 14 and 15 v esd 2000 v thermal resistance parameters symbol maximum unit thermal resistance r thja 70 k/w electrical characteristics v cc = 3 v, reference point pin 3, input signal frequency 80 khz, t amb = 25 c, unless otherwise specified parameters test conditions / pin symbol min typ max unit supply voltage range pin 1 v cc 1.2 5.25 v supply current pin 1 without reception signal with reception signal = 200 v off mode i cc 15 30 25 0.1 a a a set-up time after v cc on v cc = 1.5 v t 2 s agc amplifier input; in pin 2 reception frequency range f in 40 80 khz minimum input voltage r res = 100 k , q res > 30 v in 1 1.5 v maximum input voltage v in 40 80 mv input capacitance to gnd c in 1.5 pf
u4223b rev. a7, 06-mar-01 7 (18) parameters test conditions / pin symbol min typ max unit adc; d0, d1, d2, d3 pins 17, 18, 19 and 20 output voltage high low r load = 870 k to gnd r load = 650 k to vcc v oh v ol v cc -0.4 0.4 v v output current high low v tco = v cc /2 v tco = v cc /2 i source i sink 3 4 10 12 input current into dec (first bit) falling slope of clk i decs 24 17 11 na input current into dec (last bit) falling slope of clk i dece 28 35 42 na input current into dec (step range) falling slope of clk i decst 1.75 3.5 7 na input voltage at in (first bit) rf generator at in, without modulation rising slope of clk v min 10 db v input voltage at in (last bit) rf generator at in, without modulation rising slope of clk v max 75 db v input voltage at in (step range) rf generator at in, without modulation rising slope of clk v step 5.5 db v clock input; clk pin 12 input voltage swing v swing 50 100 v cc mv clock frequency f clk 100 125 hz dynamical input resistance r dyn. 100 k power-on/off control; pon pin 16 input voltage high low required i in 0.5 a v cc -0.2 v cc -1.2 v v input current v cc = 3 v v cc = 1.5 v v cc = 5 v i in 1.4 1.7 0.7 3 2 a a a set-up time after pon t 0.5 2 s agc hold mode; sl pin 13 input voltage high low required i in 0.5 a v cc -0.2 v cc -1.2 v v input current v in = v cc v in = gnd 2.5 0.1 a a rejection of interference signals f d f ud = 625 hz v d = 3 v, f d = 77.5 khz using 2 crystal filters using 1 crystal filter a f a f 43 22 db db
u4223b rev. a7, 06-mar-01 8 (18) test circuit (for fundamental function) d2 d3 gnd sb q1a vcc in q1b rec int dec fla flb clk sl q2a q2b pon d1 d0 ~ ipon spon vd3 vd2 vd1 vd0 vd 1.657v vcc 3v ivcc iin vin vsb ssb isb vrec iint srec sint vint vint vdec idec vclk iclk ssl isl 1m 1m 1m 300k 300k 300k 300k 100k 1m 1m 10m 420k 82p 82p 680p 3.3n 100m 10m sdec sd0 sd1 sd2 sd3 test point: dvm with high and low input line for measuring a voltage vxx or a current ixx by conversion into a voltage agc amplifier rectifier decoding time control stabilisation analog digital converter ?? u4223b irec vrec 10m figure 17. test circuit
u4223b rev. a7, 06-mar-01 9 (18) 0 2 4 6 8 10 12 80 0 20 40 60 80 0 20 40 60 ??? ??? field strength ??? time-code signal time (gating100/s) value adc figure 18. example of a normal dcf signal 0 2 4 6 8 10 12 14 80 0 20 40 60 80 0 20 40 60 ?? ?? field strength ?? ?? time-code signal time (gating100/s) value adc figure 19. example of a disturbed dcf signal
u4223b rev. a7, 06-mar-01 10 (18) application circuit for dcf 77.5 khz 1) if sl is not used, sl is connected to vcc 2) 77.5-khz crystal can be replaced by 10 pf 3) if ic is activated, pon is connected to gnd 4) voltage swing 100 mv pp at pin 12 8 7 +v cc control lines display keyboard microcomputer pon 3) ferrite antenna c 1 6.8 nf c 3 c 2 10 nf 33 nf u4223b d0 d1 d2 d3 sl 1) clk 4) 9 1 2 3 4 5 6 16 15 13 12 11 14 10 19 18 17 20 77.5 khz 2) 10 nf 10 nf 10 nf 10 nf 77.5 khz f res = 77.5 khz figure 20. application circuit for wwvb 60 khz 8 7 +v cc control lines display keyboard microcomputer pon 3) ferrite antenna c 1 60 khz 2) c 3 c 2 10 nf 47 nf u4223b d0 d1 d2 d3 sl 1) clk 4) 9 1 2 3 4 5 6 16 15 13 12 11 14 10 19 18 17 20 15 nf 60 khz 1) if sl is not used, sl is connected to vcc 2) 60-khz crystal can be replaced by 10 pf 3) if ic is activated, pon is connected to gnd 4) voltage swing 100 mv pp at pin 12 10 nf 10 nf 10 nf 10 nf f res = 60 khz 10 k rsb figure 21.
u4223b rev. a7, 06-mar-01 11 (18) application circuit for jg2as 40 khz 8 7 +v cc control lines display keyboard microcomputer pon 3) ferrite antenna c 1 680 pf c 3 10 nf u4223b d0 d1 d2 d3 sl 1) clk 4) 9 1 2 3 4 5 6 16 15 13 12 11 14 10 19 18 17 20 40 khz 40 khz 2) c 2 220 nf 1 m r 1) if sl is not used, sl is connected to vcc 2) 40-khz crystal can be replaced by 22 pf 3) if ic is activated, pon is connected to gnd 4) voltage swing 100 mv pp at pin 12 10 nf 10 nf 10 nf 10 nf f res = 40 khz figure 22.
u4223b rev. a7, 06-mar-01 12 (18) pad coordinates the t4223b is also available as die for achip-on-boardo mounting. die size: 2.26 x 2.09 mm pad size: 100 x 100 m (contact window 88 x 88 m) thickness: 300 m 20 m symbol x-axis/ m y-axis/ m in1 128 832 in 128 310 gnd 354 124 sb 698 128 q1a 1040 128 q1b 1290 128 rec 1528 128 int 1766 128 dec 2044 268 fla 2044 676 flb 2044 1072 symbol x-axis/ m y-axis/ m clk 2044 1400 sl 2044 1638 q2a 2000 1876 q2b 1634 1876 pon 1322 1876 tco 1008 1876 d3 696 1876 d2 384 1876 d1 128 1682 d0 128 1454 vcc 128 1138 the pad coordinates are referred to the left bottom point of the contact window. pad layout tco d2 d3 pon q2b q2a d1 d0 vcc in1 in gnd sb q1a q1b rec int sl clk flb fla dec 94 8892 t4223b reference point (%) y axis x axis figure 23.
u4223b rev. a7, 06-mar-01 13 (18) information on the german transmitter station: dcf 77, frequency 77.5 khz, transmitting power 50 kw location: mainflingen/germany, geographical coordinates: 50 0.1'n, 09 00'e time of transmission: permanent 0 5 10 15 20 25 30 40 50 55 0 5 10 coding when required minutes hours day of the week month year 35 45 21 22 23 24 25 26 27 28 30 29 31 32 33 34 35 1248 10 20 40 p1 1 2 4 81020 p2 a1 z1 z2 1 2 4 s 20 10 8 r 40 p1 1 8 10 20 2 4 p2 1 4 2 8 20 10 1 2 4 1 2 4 8 10 2 4 8 10 1 20 40 80 p3 time frame 1 minute ( index count 1 second ) time frame calendar day minutes hours 20 seconds s start bit parity bit p1 parity bit p2 example:19.35 h a2 figure 24. modulation the carrier amplitude is reduced to 25% at the beginning of each second for a period of 100 ms (binary zero) or 200 ms (binary one), except the 59th second. time-code format (based on information of deutsche bundespost) the time-code format consists of 1-minute time frames. there is no modulation at the beginning of the 59th second to indicate the switch over to the next 1-minute time frame. a time frame contains bcd-coded infor- mation of minutes, hours, calendar day, day of the week, month and year between the 20th second and 58th second of the time frame, including the start bit s (200 ms) and parity bits p1, p2 and p3. furthermore, there are 5 addi- tional bits r (transmission by reserve antenna), a1 (announcement of change-over to summer time), z1 (dur- ing summer time 200 ms, otherwise 100 ms), z2 (during standard time 200 ms, otherwise 100 ms) and a2 (announcement of leap second) transmitted between the 15th second and 19th second of the time frame.
u4223b rev. a7, 06-mar-01 14 (18) information on the british transmitter station: msf frequency 60 khz transmitting power 50 kw location: teddington, middlesex geographical coordinates: 52 22'n, 01 11'w time of transmission: permanent, except the first tuesday of each month from 10.00 h to 14.00 h. 05 10 15 20 25 30 40 50 55 0510 35 45 year day of month month day of week hour minute minute identifier hour + minute day of week day + month year time frame 1 minute time frame ( index count 1 second) parity check bits bst bst 7 gmt change impending 80 40 20 10 8 4 2 1 8 4 2 1 10 20 10 8 4 2 1 2 1 4 20 10 1 8 4 2 40 20 10 4 8 2 1 0 0 500 ms 500 ms switch over to the next time frame 80 40 20 10 42 1 10 8 8 4 2 1 18 19 20 21 22 23 24 25 26 27 28 29 30 year month 17 seconds 0 1 example: march 1993 figure 25. modulation the carrier amplitude is switched off at the beginning of each second for a period of 100 ms (binary zero) or 200 ms (binary one). time-code format the time-code format consists of 1-minute time frames. a time frame contains bcdcoded information of year, month, calendar day, day of the week, hours and minutes. at the switch-over to the next time frame, the carrier amplitude is switched off for a period of 500 ms. the prescence of the fast code during the first 500 ms at the beginning of the minute in not guaranteed. the trans- mission rate is 100 bits/s and the code contains information of hour, minute, day and month.
u4223b rev. a7, 06-mar-01 15 (18) information on the us transmitter station: wwvb frequency 60 khz transmitting power 40 kw location: fort collins geographical coordinates: 40 40'n, 105 03'w time of transmission: permanent 0 510 2025 30 40 50 55 0 510 time frame 35 45 p0 40 20 10 8421p1 0 1 2 35 4 6 7 89 10 11 12 13 14 15 16 17 18 19 20 p2 2010 8421 hours hours 15 minutes minutes days fr m 20 10 40 4 2 1 p1 8 10 20 8 4 2 1 p2 100 2 00 40 20 10 80 p3 8 4 2 1 a d d su b a d d p4 800 400 200 100 80 40 20 10 p5 8 4 2 1 p0 p0 uti uti sign correction year daylight savings time bits leap second warning bit leap year indicator bit a0o = non leap year a1o = leap year time frame 1 minute ( index count 1 second) frame-reference marker seconds example: utc 18.42 h time frame figure 26. modulation the carrier amplitude is reduced by 10 db at the begin- ning of each second and is restored within 500 ms (binary one) or within 200 ms (binary zero). time-code format the time-code format consists of 1-minute time frames. a time frame contains bcd-coded information of minutes, hours, days and year. in addition, there are 6 position-identifier markers (p0 thru p5) and 1 frame- reference marker with reduced carrier amplitude of 800 ms duration.
u4223b rev. a7, 06-mar-01 16 (18) information on the japanese transmitter station: jg2as frequency 40 khz transmitting power 10 kw location: sanwa, ibaraki geographical coordinates: 36 11' n, 139 51' e time of transmission: permanent 0 5 10 20 30 40 55 0 5 35 45 seconds 40 20 10 8 42 1p1 0 123 5 4 6 7 8 9 1011121314151617181920 p2 20 10 8 4 21 hours time frame 15 minutes 0.5 s 0.8 s 0.2 s a1o a0o apo 0.5 second: binary one 0.8 second: binary zero 0.2 second: identifier markers p0...p5 25 50 10 po frm 40 20 10 8 4 2 1 p1 10 20 8 4 2 1 p2 200 10 0 80 40 20 10 p3 8 4 2 1 add sub add p4 8 2 1 4 p5 p0 minutes hours days p0 frame-reference marker (frm) position-identifier marker p0 position identifier marker p1 example: 18.42 h time frame 1 minute (index count 1 second) time frame dut1 code 59 figure 27. modulation the carrier amplitude is 100% at the beginning of each second and is switched off after 500 ms (binary one) or after 800 ms (binary zero). time-code format the time-code format consists of 1-minute time frames. a time frame contains bcd-coded information of minutes, hours and days. in addition, there are 6 position- identifier markers (p0 thru p5) and 1 frame-reference markers (frm) with reduced carrier amplitude of 800 ms duration.
u4223b rev. a7, 06-mar-01 17 (18) package information 13007 technical drawings according to din specifications package sso20 dimensions in mm 6.75 6.50 0.25 0.65 5.85 1.30 0.15 0.05 5.7 5.3 4.5 4.3 6.6 6.3 0.15 20 11 110
u4223b rev. a7, 06-mar-01 18 (18) ozone depleting substances policy statement it is the policy of atmel germany gmbh to 1. meet all present and future national and international statutory requirements. 2. regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. it is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (odss). the montreal protocol ( 1987) and its london amendments ( 1990) intend to severely restrict the use of odss and forbid their use within the next ten years. various national and international initiatives are pressing for an earlier ban on these substances. atmel germany gmbh has been able to use its policy of continuous improvements to eliminate the use of odss listed in the following documents. 1. annex a, b and list of transitional substances of the montreal protocol and the london amendments respectively 2. class i and ii ozone depleting substances in the clean air act amendments of 1990 by the environmental protection agency (epa) in the usa 3. council decision 88/540/eec and 91/690/eec annex a, b and c (transitional substances) respectively. atmel germany gmbh can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. we reserve the right to make changes to improve technical design and may do so without further notice . parameters can vary in different applications. all operating parameters must be validated for each customer application by the customer. should the buyer use atmel wireless & microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify atmel wireless & microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. data sheets can also be retrieved from the internet: http://www.atmelwm.com atmel germany gmbh, p.o.b. 3535, d-74025 heilbronn, germany telephone: 49 (0)7131 67 2594, fax number: 49 (0)7131 67 2423

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